It is generally known that these three links constitute the minimum configuration of a data transfer connection so that in case the primary device has to be connected to a plurality of m.times.n secondary devices, the required data transfer connection has to comprise a total number of links equal to 3.times.m.times.n, each set of 3 links being associated to a distinct secondary device. For example, the data transfer connection between a primary device and four (2.times.2) secondary devices then comprises 3 .times.4=12 links.
This total number of links may be slightly reduced by using all the clock links as well as all the read/write links of the m.times.n secondary devices in common. Indeed, as a result the primary device is then only connected to one clock link, one read/write link and as many data links as there are secondary devices so that the data transfer connection then comprises a total of 2+(m.times.n) links, each data link being associated to a distinct secondary device.
A drawback of such a connection is that when the primary device is integrated on an electronic chip the relatively high number of links (3.times.m.times.n or 2+(m.times.n)) also requires an identical high number of pins and this is generally unacceptable.